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// Copyright (c) 1994-2009 Nokia Corporation and/or its subsidiary(-ies).
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// All rights reserved.
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// This component and the accompanying materials are made available
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// under the terms of the License "Eclipse Public License v1.0"
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// which accompanies this distribution, and is available
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// at the URL "http://www.eclipse.org/legal/epl-v10.html".
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//
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// Initial Contributors:
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// Nokia Corporation - initial contribution.
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//
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// Contributors:
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//
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// Description:
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// naviengine_assp\assp.cpp
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//
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//
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#include <assp.h>
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#ifdef __SMP__
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TSpinLock AsspLock(TSpinLock::EOrderGenericIrqLow1);
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#endif
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///////////////////////////////////////////////////////////////////////////////
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//
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// MHA - Modular Hardware Adaption
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//
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// Register Access
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//
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///////////////////////////////////////////////////////////////////////////////
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///////////////////////////////////////////////////////////////////////////////
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// We need spin locks around read, modify, write operations because another CPU
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// may access the same memory in between operations and potentially cause
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// memory corruption.
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///////////////////////////////////////////////////////////////////////////////
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EXPORT_C void AsspRegister::Modify8(TLinAddr aAddr, TUint8 aClearMask, TUint8 aSetMask)
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{
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TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock);
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TUint8 value = *(volatile TUint8 *)aAddr;
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value &= ~aClearMask;
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value |= aSetMask;
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*(volatile TUint8 *)aAddr = value;
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__SPIN_UNLOCK_IRQRESTORE(AsspLock,irq);
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}
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EXPORT_C void AsspRegister::Modify16(TLinAddr aAddr, TUint16 aClearMask, TUint16 aSetMask)
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{
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TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock);
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TUint16 value = *(volatile TUint16 *)aAddr;
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value &= ~aClearMask;
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value |= aSetMask;
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*(volatile TUint16 *)aAddr = value;
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__SPIN_UNLOCK_IRQRESTORE(AsspLock,irq);
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}
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EXPORT_C void AsspRegister::Modify32(TLinAddr aAddr, TUint32 aClearMask, TUint32 aSetMask)
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{
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TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock);
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TUint32 value = *(volatile TUint32 *)aAddr;
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value &= ~aClearMask;
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value |= aSetMask;
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*(volatile TUint32 *)aAddr = value;
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__SPIN_UNLOCK_IRQRESTORE(AsspLock,irq);
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}
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///////////////////////////////////////////////////////////////////////////////
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// 64 bit operations may be more complex than 8/16/32 bit operations, depending
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// upon hardware support for 64 bit accesses.
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//
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// For example, one platform required an assembly language function to prevent
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// the compliler optimising the accesses into 2 x 32 bit accesses and causing a
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// bus error.
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//
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// Spinlocks are required for non-atomic operations and are therefore
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// recommended for 64 bit accesses on current platforms.
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///////////////////////////////////////////////////////////////////////////////
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extern TUint64 DoRead64(TLinAddr aAddr);
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EXPORT_C TUint64 AsspRegister::Read64(TLinAddr aAddr)
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{
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TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock);
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TUint64 value = DoRead64(aAddr);
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__SPIN_UNLOCK_IRQRESTORE(AsspLock,irq);
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return value;
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}
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extern void DoWrite64(TLinAddr aAddr, TUint64 aValue);
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EXPORT_C void AsspRegister::Write64(TLinAddr aAddr, TUint64 aValue)
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{
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TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock);
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DoWrite64(aAddr, aValue);
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__SPIN_UNLOCK_IRQRESTORE(AsspLock,irq);
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}
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EXPORT_C void AsspRegister::Modify64(TLinAddr aAddr, TUint64 aClearMask, TUint64 aSetMask)
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{
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TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock);
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TUint64 value = DoRead64(aAddr);
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value &= ~aClearMask;
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value |= aSetMask;
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DoWrite64(aAddr, value);
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__SPIN_UNLOCK_IRQRESTORE(AsspLock,irq);
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}
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