# HG changeset patch # User moel.mich # Date 1375358229 0 # Node ID 4865cf06a7faf2c5221658f17d48a834e031812c # Parent f117373bd190c2f5f41928fde866fc700bcbec1c Added experimental support for Intel Ivy Bridge-E CPUs. diff -r f117373bd190 -r 4865cf06a7fa Hardware/CPU/IntelCPU.cs --- a/Hardware/CPU/IntelCPU.cs Sun Jul 21 21:03:31 2013 +0000 +++ b/Hardware/CPU/IntelCPU.cs Thu Aug 01 11:57:09 2013 +0000 @@ -132,6 +132,7 @@ tjMax = GetTjMaxFromMSR(); break; case 0x3A: // Intel Core i5, i7 3xxx LGA1155 (22nm) + case 0x3E: // Intel Core i7 4xxx LGA2011 (22nm) microarchitecture = Microarchitecture.IvyBridge; tjMax = GetTjMaxFromMSR(); break; diff -r f117373bd190 -r 4865cf06a7fa Hardware/LPC/NCT677X.cs --- a/Hardware/LPC/NCT677X.cs Sun Jul 21 21:03:31 2013 +0000 +++ b/Hardware/LPC/NCT677X.cs Thu Aug 01 11:57:09 2013 +0000 @@ -418,15 +418,16 @@ 0xC00, 0xC10, 0xC20, 0xC30, 0xC50, 0xC60, 0xC70, 0xD00, 0xD10, 0xD20, 0xD30, 0xD50, 0xD60, 0xE00, 0xE10, 0xE20, 0xE30, - 0xF00, 0xF10, 0xF20, 0xF30}; + 0xF00, 0xF10, 0xF20, 0xF30, + 0x8040}; r.AppendLine("Hardware Monitor Registers"); r.AppendLine(); - r.AppendLine(" 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F"); + r.AppendLine(" 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F"); r.AppendLine(); foreach (ushort address in addresses) { r.Append(" "); - r.Append(address.ToString("X3", CultureInfo.InvariantCulture)); + r.Append(address.ToString("X4", CultureInfo.InvariantCulture)); r.Append(" "); for (ushort j = 0; j <= 0xF; j++) { r.Append(" "); diff -r f117373bd190 -r 4865cf06a7fa Properties/AssemblyVersion.cs --- a/Properties/AssemblyVersion.cs Sun Jul 21 21:03:31 2013 +0000 +++ b/Properties/AssemblyVersion.cs Thu Aug 01 11:57:09 2013 +0000 @@ -10,5 +10,5 @@ using System.Reflection; -[assembly: AssemblyVersion("0.6.0.3")] -[assembly: AssemblyInformationalVersion("0.6.0.3 Alpha")] \ No newline at end of file +[assembly: AssemblyVersion("0.6.0.5")] +[assembly: AssemblyInformationalVersion("0.6.0.5 Alpha")] \ No newline at end of file