moel@196: /* moel@196: moel@196: Version: MPL 1.1/GPL 2.0/LGPL 2.1 moel@196: moel@196: The contents of this file are subject to the Mozilla Public License Version moel@196: 1.1 (the "License"); you may not use this file except in compliance with moel@196: the License. You may obtain a copy of the License at moel@196: moel@196: http://www.mozilla.org/MPL/ moel@196: moel@196: Software distributed under the License is distributed on an "AS IS" basis, moel@196: WITHOUT WARRANTY OF ANY KIND, either express or implied. See the License moel@196: for the specific language governing rights and limitations under the License. moel@196: moel@196: The Original Code is the Open Hardware Monitor code. moel@196: moel@196: The Initial Developer of the Original Code is moel@196: Michael Möller . moel@196: Portions created by the Initial Developer are Copyright (C) 2009-2010 moel@196: the Initial Developer. All Rights Reserved. moel@196: moel@196: Contributor(s): moel@196: moel@196: Alternatively, the contents of this file may be used under the terms of moel@196: either the GNU General Public License Version 2 or later (the "GPL"), or moel@196: the GNU Lesser General Public License Version 2.1 or later (the "LGPL"), moel@196: in which case the provisions of the GPL or the LGPL are applicable instead moel@196: of those above. If you wish to allow use of your version of this file only moel@196: under the terms of either the GPL or the LGPL, and not to allow others to moel@196: use your version of this file under the terms of the MPL, indicate your moel@196: decision by deleting the provisions above and replace them with the notice moel@196: and other provisions required by the GPL or the LGPL. If you do not delete moel@196: the provisions above, a recipient may use your version of this file under moel@196: the terms of any one of the MPL, the GPL or the LGPL. moel@196: moel@196: */ moel@196: moel@196: namespace OpenHardwareMonitor.Hardware.CPU { moel@196: moel@196: internal abstract class AMDCPU : GenericCPU { moel@196: moel@196: private const byte PCI_BUS = 0; moel@196: private const byte PCI_BASE_DEVICE = 24; moel@196: private const byte DEVICE_VENDOR_ID_REGISTER = 0; moel@196: private const ushort AMD_VENDOR_ID = 0x1022; moel@196: moel@196: public AMDCPU(int processorIndex, CPUID[][] cpuid, ISettings settings) moel@196: : base(processorIndex, cpuid, settings) { } moel@196: moel@196: protected uint GetPciAddress(byte function, ushort deviceId) { moel@197: moel@197: // assemble the pci address moel@236: uint address = Ring0.GetPciAddress(PCI_BUS, moel@196: (byte)(PCI_BASE_DEVICE + processorIndex), function); moel@196: moel@197: // verify that we have the correct bus, device and function moel@196: uint deviceVendor; moel@236: if (!Ring0.ReadPciConfig( moel@196: address, DEVICE_VENDOR_ID_REGISTER, out deviceVendor)) moel@236: return Ring0.InvalidPciAddress; moel@197: moel@196: if (deviceVendor != (deviceId << 16 | AMD_VENDOR_ID)) moel@236: return Ring0.InvalidPciAddress; moel@196: moel@196: return address; moel@196: } moel@196: moel@196: } moel@196: }