OpenHardwareMonitor: Hardware/CPU/IntelCPU.cs@f8e72b2efcc0

     1 /*

     3   Version: MPL 1.1/GPL 2.0/LGPL 2.1

     5   The contents of this file are subject to the Mozilla Public License Version

     6   1.1 (the "License"); you may not use this file except in compliance with

     7   the License. You may obtain a copy of the License at

     9   http://www.mozilla.org/MPL/

    11   Software distributed under the License is distributed on an "AS IS" basis,

    12   WITHOUT WARRANTY OF ANY KIND, either express or implied. See the License

    13   for the specific language governing rights and limitations under the License.

    15   The Original Code is the Open Hardware Monitor code.

    17   The Initial Developer of the Original Code is

    18   Michael Möller <m.moeller@gmx.ch>.

    19   Portions created by the Initial Developer are Copyright (C) 2009-2010

    20   the Initial Developer. All Rights Reserved.

    22   Contributor(s):

    24   Alternatively, the contents of this file may be used under the terms of

    25   either the GNU General Public License Version 2 or later (the "GPL"), or

    26   the GNU Lesser General Public License Version 2.1 or later (the "LGPL"),

    27   in which case the provisions of the GPL or the LGPL are applicable instead

    28   of those above. If you wish to allow use of your version of this file only

    29   under the terms of either the GPL or the LGPL, and not to allow others to

    30   use your version of this file under the terms of the MPL, indicate your

    31   decision by deleting the provisions above and replace them with the notice

    32   and other provisions required by the GPL or the LGPL. If you do not delete

    33   the provisions above, a recipient may use your version of this file under

    34   the terms of any one of the MPL, the GPL or the LGPL.

    36 */

    38 using System;

    39 using System.Globalization;

    40 using System.Text;

    42 namespace OpenHardwareMonitor.Hardware.CPU {

    43   internal sealed class IntelCPU : GenericCPU {

    45     private enum Microarchitecture {

    46       Unknown,

    47       Core,

    48       Atom,

    49       Nehalem

    50     }

    52     private readonly Sensor[] coreTemperatures;

    53     private readonly Sensor[] coreClocks;

    54     private readonly Sensor busClock;

    56     private readonly Microarchitecture microarchitecture;

    57     private readonly double timeStampCounterMultiplier;

    59     private const uint IA32_THERM_STATUS_MSR = 0x019C;

    60     private const uint IA32_TEMPERATURE_TARGET = 0x01A2;

    61     private const uint IA32_PERF_STATUS = 0x0198;

    62     private const uint MSR_PLATFORM_INFO = 0xCE;

    64     private float[] Floats(float f) {

    65       float[] result = new float[coreCount];

    66       for (int i = 0; i < coreCount; i++)

    67         result[i] = f;

    68       return result;

    69     }

    71     public IntelCPU(int processorIndex, CPUID[][] cpuid, ISettings settings)

    72       : base(processorIndex, cpuid, settings)

    73     {

    74       // set tjMax

    75       float[] tjMax;

    76       switch (family) {

    77         case 0x06: {

    78             switch (model) {

    79               case 0x0F: // Intel Core 2 (65nm)

    80                 microarchitecture = Microarchitecture.Core;

    81                 switch (stepping) {

    82                   case 0x06: // B2

    83                     switch (coreCount) {

    84                       case 2:

    85                         tjMax = Floats(80 + 10); break;

    86                       case 4:

    87                         tjMax = Floats(90 + 10); break;

    88                       default:

    89                         tjMax = Floats(85 + 10); break;

    90                     }

    91                     tjMax = Floats(80 + 10); break;

    92                   case 0x0B: // G0

    93                     tjMax = Floats(90 + 10); break;

    94                   case 0x0D: // M0

    95                     tjMax = Floats(85 + 10); break;

    96                   default:

    97                     tjMax = Floats(85 + 10); break;

    98                 } break;

    99               case 0x17: // Intel Core 2 (45nm)

   100                 microarchitecture = Microarchitecture.Core;

   101                 tjMax = Floats(100); break;

   102               case 0x1C: // Intel Atom (45nm)

   103                 microarchitecture = Microarchitecture.Atom;

   104                 switch (stepping) {

   105                   case 0x02: // C0

   106                     tjMax = Floats(90); break;

   107                   case 0x0A: // A0, B0

   108                     tjMax = Floats(100); break;

   109                   default:

   110                     tjMax = Floats(90); break;

   111                 } break;

   112               case 0x1A: // Intel Core i7 LGA1366 (45nm)

   113               case 0x1E: // Intel Core i5, i7 LGA1156 (45nm)

   114               case 0x25: // Intel Core i3, i5, i7 LGA1156 (32nm)

   115               case 0x2C: // Intel Core i7 LGA1366 (32nm) 6 Core

   116                 microarchitecture = Microarchitecture.Nehalem;

   117                 uint eax, edx;

   118                 tjMax = new float[coreCount];

   119                 for (int i = 0; i < coreCount; i++) {

   120                   if (Ring0.RdmsrTx(IA32_TEMPERATURE_TARGET, out eax,

   121                     out edx, 1UL << cpuid[i][0].Thread)) {

   122                     tjMax[i] = (eax >> 16) & 0xFF;

   123                   } else {

   124                     tjMax[i] = 100;

   125                   }

   126                 }

   127                 break;

   128               default:

   129                 microarchitecture = Microarchitecture.Unknown;

   130                 tjMax = Floats(100);

   131                 break;

   132             }

   133           } break;

   134         default:

   135           microarchitecture = Microarchitecture.Unknown;

   136           tjMax = Floats(100);

   137           break;

   138       }

   140       // set timeStampCounterMultiplier

   141       switch (microarchitecture) {

   142         case Microarchitecture.Atom:

   143         case Microarchitecture.Core: {

   144             uint eax, edx;

   145             if (Ring0.Rdmsr(IA32_PERF_STATUS, out eax, out edx)) {

   146               timeStampCounterMultiplier =

   147                 ((edx >> 8) & 0x1f) + 0.5 * ((edx >> 14) & 1);

   148             }

   149           } break;

   150         case Microarchitecture.Nehalem: {

   151             uint eax, edx;

   152             if (Ring0.Rdmsr(MSR_PLATFORM_INFO, out eax, out edx)) {

   153               timeStampCounterMultiplier = (eax >> 8) & 0xff;

   154             }

   155           } break;

   156         default:

   157           timeStampCounterMultiplier = 1;

   158           break;

   159       }

   161       // check if processor supports a digital thermal sensor

   162       if (cpuid[0][0].Data.GetLength(0) > 6 &&

   163         (cpuid[0][0].Data[6, 0] & 1) != 0) {

   164         coreTemperatures = new Sensor[coreCount];

   165         for (int i = 0; i < coreTemperatures.Length; i++) {

   166           coreTemperatures[i] = new Sensor(CoreString(i), i,

   167             SensorType.Temperature, this, new [] {

   168               new ParameterDescription(

   169                 "TjMax [°C]", "TjMax temperature of the core.\n" +

   170                 "Temperature = TjMax - TSlope * Value.", tjMax[i]),

   171               new ParameterDescription("TSlope [°C]",

   172                 "Temperature slope of the digital thermal sensor.\n" +

   173                 "Temperature = TjMax - TSlope * Value.", 1)}, settings);

   174           ActivateSensor(coreTemperatures[i]);

   175         }

   176       } else {

   177         coreTemperatures = new Sensor[0];

   178       }

   180       busClock = new Sensor("Bus Speed", 0, SensorType.Clock, this, settings);

   181       coreClocks = new Sensor[coreCount];

   182       for (int i = 0; i < coreClocks.Length; i++) {

   183         coreClocks[i] =

   184           new Sensor(CoreString(i), i + 1, SensorType.Clock, this, settings);

   185         if (HasTimeStampCounter)

   186           ActivateSensor(coreClocks[i]);

   187       }

   189       Update();

   190     }

   192     protected override uint[] GetMSRs() {

   193       return new [] {

   194         MSR_PLATFORM_INFO,

   195         IA32_PERF_STATUS ,

   196         IA32_THERM_STATUS_MSR,

   197         IA32_TEMPERATURE_TARGET

   198       };

   199     }

   201     public override string GetReport() {

   202       StringBuilder r = new StringBuilder();

   203       r.Append(base.GetReport());

   205       r.Append("Time Stamp Counter Multiplier: ");

   206       r.AppendLine(timeStampCounterMultiplier.ToString(

   207         CultureInfo.InvariantCulture));

   208       r.AppendLine();

   210       return r.ToString();

   211     }

   213     public override void Update() {

   214       base.Update();

   216       for (int i = 0; i < coreTemperatures.Length; i++) {

   217         uint eax, edx;

   218         if (Ring0.RdmsrTx(

   219           IA32_THERM_STATUS_MSR, out eax, out edx,

   220             1UL << cpuid[i][0].Thread)) {

   221           // if reading is valid

   222           if ((eax & 0x80000000) != 0) {

   223             // get the dist from tjMax from bits 22:16

   224             float deltaT = ((eax & 0x007F0000) >> 16);

   225             float tjMax = coreTemperatures[i].Parameters[0].Value;

   226             float tSlope = coreTemperatures[i].Parameters[1].Value;

   227             coreTemperatures[i].Value = tjMax - tSlope * deltaT;

   228           } else {

   229             coreTemperatures[i].Value = null;

   230           }

   231         }

   232       }

   234       if (HasTimeStampCounter) {

   235         double newBusClock = 0;

   236         uint eax, edx;

   237         for (int i = 0; i < coreClocks.Length; i++) {

   238           System.Threading.Thread.Sleep(1);

   239           if (Ring0.RdmsrTx(IA32_PERF_STATUS, out eax, out edx,

   240             1UL << cpuid[i][0].Thread))

   241           {

   242             newBusClock =

   243               TimeStampCounterFrequency / timeStampCounterMultiplier;

   244             if (microarchitecture == Microarchitecture.Nehalem) {

   245               uint multiplier = eax & 0xff;

   246               coreClocks[i].Value = (float)(multiplier * newBusClock);

   247             } else {

   248               double multiplier = ((eax >> 8) & 0x1f) + 0.5 * ((eax >> 14) & 1);

   249               coreClocks[i].Value = (float)(multiplier * newBusClock);

   250             }

   251           } else {

   252             // if IA32_PERF_STATUS is not available, assume TSC frequency

   253             coreClocks[i].Value = (float)TimeStampCounterFrequency;

   254           }

   255         }

   256         if (newBusClock > 0) {

   257           this.busClock.Value = (float)newBusClock;

   258           ActivateSensor(this.busClock);

   259         }

   260       }

   261     }

   262   }

   263 }

author	moel.mich
	Sun, 21 Nov 2010 17:31:25 +0000
changeset 245	f8e72b2efcc0
parent 236	763675f19ff4
child 249	3b5be5dce071
permissions	-rw-r--r--