Hardware/CPU/AMD0FCPU.cs
author moel.mich
Sun, 14 Feb 2010 20:16:30 +0000
changeset 44 c150de283ca0
parent 31 c4d1fb76a9e1
child 50 7d83a09511f0
permissions -rw-r--r--
Added core and bus clock support for Intel CPUs (Core 2).
     1 /*
     2   
     3   Version: MPL 1.1/GPL 2.0/LGPL 2.1
     4 
     5   The contents of this file are subject to the Mozilla Public License Version
     6   1.1 (the "License"); you may not use this file except in compliance with
     7   the License. You may obtain a copy of the License at
     8  
     9   http://www.mozilla.org/MPL/
    10 
    11   Software distributed under the License is distributed on an "AS IS" basis,
    12   WITHOUT WARRANTY OF ANY KIND, either express or implied. See the License
    13   for the specific language governing rights and limitations under the License.
    14 
    15   The Original Code is the Open Hardware Monitor code.
    16 
    17   The Initial Developer of the Original Code is 
    18   Michael Möller <m.moeller@gmx.ch>.
    19   Portions created by the Initial Developer are Copyright (C) 2009-2010
    20   the Initial Developer. All Rights Reserved.
    21 
    22   Contributor(s):
    23 
    24   Alternatively, the contents of this file may be used under the terms of
    25   either the GNU General Public License Version 2 or later (the "GPL"), or
    26   the GNU Lesser General Public License Version 2.1 or later (the "LGPL"),
    27   in which case the provisions of the GPL or the LGPL are applicable instead
    28   of those above. If you wish to allow use of your version of this file only
    29   under the terms of either the GPL or the LGPL, and not to allow others to
    30   use your version of this file under the terms of the MPL, indicate your
    31   decision by deleting the provisions above and replace them with the notice
    32   and other provisions required by the GPL or the LGPL. If you do not delete
    33   the provisions above, a recipient may use your version of this file under
    34   the terms of any one of the MPL, the GPL or the LGPL.
    35  
    36 */
    37 
    38 using System;
    39 using System.Collections.Generic;
    40 using System.Drawing;
    41 using System.Diagnostics;
    42 using System.Text;
    43 
    44 
    45 namespace OpenHardwareMonitor.Hardware.CPU {
    46   public class AMD0FCPU : Hardware, IHardware {
    47 
    48     private string name;
    49     private Image icon;
    50 
    51     private uint pciAddress;
    52 
    53     private Sensor[] coreTemperatures;
    54     private float offset;
    55 
    56     private Sensor totalLoad;
    57     private Sensor[] coreLoads;
    58 
    59     private CPULoad cpuLoad;
    60 
    61     private const ushort PCI_AMD_VENDOR_ID = 0x1022;
    62     private const ushort PCI_AMD_0FH_MISCELLANEOUS_DEVICE_ID = 0x1103;
    63     private const uint THERMTRIP_STATUS_REGISTER = 0xE4;
    64     private const byte THERM_SENSE_CORE_SEL_CPU0 = 0x2;
    65     private const byte THERM_SENSE_CORE_SEL_CPU1 = 0x0;
    66 
    67     public AMD0FCPU(string name, uint family, uint model, uint stepping, 
    68       uint[,] cpuidData, uint[,] cpuidExtData) {
    69       
    70       this.name = name;
    71       this.icon = Utilities.EmbeddedResources.GetImage("cpu.png");     
    72 
    73       uint coreCount = 1;
    74       if (cpuidExtData.GetLength(0) > 8)
    75         coreCount = (cpuidExtData[8, 2] & 0xFF) + 1;
    76 
    77       // max two cores
    78       coreCount = coreCount > 2 ? 2 : coreCount;
    79 
    80       totalLoad = new Sensor("CPU Total", 0, SensorType.Load, this);
    81         
    82       coreTemperatures = new Sensor[coreCount];
    83       coreLoads = new Sensor[coreCount];
    84       for (int i = 0; i < coreCount; i++) {
    85         coreTemperatures[i] =
    86           new Sensor("Core #" + (i + 1), i, SensorType.Temperature, this);
    87         coreLoads[i] = new Sensor("Core #" + (i + 1), i + 1,
    88           SensorType.Load, this);
    89       }
    90 
    91       cpuLoad = new CPULoad(coreCount, 1);
    92       if (cpuLoad.IsAvailable) {
    93         foreach (Sensor sensor in coreLoads)
    94           ActivateSensor(sensor);
    95         ActivateSensor(totalLoad);
    96       }
    97 
    98       pciAddress = WinRing0.FindPciDeviceById(PCI_AMD_VENDOR_ID,
    99         PCI_AMD_0FH_MISCELLANEOUS_DEVICE_ID, 0);
   100 
   101       offset = -49.0f;
   102 
   103       // AM2+ 65nm +21 offset
   104       if (model >= 0x69 && model != 0xc1 && model != 0x6c && model != 0x7c) 
   105         offset += 21;
   106 
   107       Update();                   
   108     }
   109 
   110     public string Name {
   111       get { return name; }
   112     }
   113 
   114     public string Identifier {
   115       get { return "/amdcpu/0"; }
   116     }
   117 
   118     public Image Icon {
   119       get { return icon; }
   120     }
   121 
   122     public string GetReport() {
   123       return null;
   124     }
   125 
   126     public void Update() {
   127       if (pciAddress != 0xFFFFFFFF) {
   128 
   129         for (uint i = 0; i < coreTemperatures.Length; i++) {
   130           if (WinRing0.WritePciConfigDwordEx(
   131             pciAddress, THERMTRIP_STATUS_REGISTER,
   132             i > 0 ? THERM_SENSE_CORE_SEL_CPU1 : THERM_SENSE_CORE_SEL_CPU0)) {
   133             uint value;
   134             if (WinRing0.ReadPciConfigDwordEx(
   135               pciAddress, THERMTRIP_STATUS_REGISTER, out value)) {
   136               coreTemperatures[i].Value = ((value >> 16) & 0xFF) + offset;
   137               ActivateSensor(coreTemperatures[i]);
   138             } else {
   139               DeactivateSensor(coreTemperatures[i]);
   140             }
   141           }
   142         }
   143       }
   144 
   145       if (cpuLoad.IsAvailable) {
   146         cpuLoad.Update();
   147         for (int i = 0; i < coreLoads.Length; i++)
   148           coreLoads[i].Value = cpuLoad.GetCoreLoad(i);
   149         totalLoad.Value = cpuLoad.GetTotalLoad();
   150       }
   151     }   
   152   }
   153 }