Hardware/CPU/AMD0FCPU.cs
changeset 194 fbf22ccd9d6f
parent 193 52ef1cf6b8e5
child 195 0ee888c485d5
     1.1 --- a/Hardware/CPU/AMD0FCPU.cs	Tue Sep 21 10:18:07 2010 +0000
     1.2 +++ b/Hardware/CPU/AMD0FCPU.cs	Tue Sep 21 10:33:28 2010 +0000
     1.3 @@ -98,10 +98,7 @@
     1.4  
     1.5      protected override uint[] GetMSRs() {
     1.6        return new uint[] {
     1.7 -        FIDVID_STATUS,
     1.8 -        THERMTRIP_STATUS_REGISTER,
     1.9 -        THERM_SENSE_CORE_SEL_CPU0,
    1.10 -        THERM_SENSE_CORE_SEL_CPU1
    1.11 +        FIDVID_STATUS
    1.12        };
    1.13      }
    1.14  
    1.15 @@ -132,9 +129,6 @@
    1.16          for (int i = 0; i < coreClocks.Length; i++) {
    1.17            Thread.Sleep(1);
    1.18  
    1.19 -          // Fail-safe value - if the code below fails, we'll use this instead
    1.20 -          coreClocks[i].Value = (float)MaxClock;
    1.21 -
    1.22            uint eax, edx;
    1.23            if (WinRing0.RdmsrTx(FIDVID_STATUS, out eax, out edx,
    1.24              (UIntPtr)(1L << cpuid[i][0].Thread))) {
    1.25 @@ -144,6 +138,9 @@
    1.26              double maxMP = 0.5 * ((eax >> 16 & 0x3F) + 8);
    1.27              coreClocks[i].Value = (float)(curMP * MaxClock / maxMP);
    1.28              newBusClock = (float)(MaxClock / maxMP);
    1.29 +          } else {
    1.30 +            // Fail-safe value - if the code above fails, we'll use this instead
    1.31 +            coreClocks[i].Value = (float)MaxClock;
    1.32            }
    1.33          }
    1.34