1.1 --- a/Hardware/CPU/AMD10CPU.cs	Mon Oct 18 07:18:14 2010 +0000
     1.2 +++ b/Hardware/CPU/AMD10CPU.cs	Sun Oct 31 22:08:47 2010 +0000
     1.3 @@ -93,15 +93,15 @@
     1.4          (UIntPtr)(1L << cpuid[0][0].Thread));
     1.5  
     1.6        uint ctlEax, ctlEdx;
     1.7 -      WinRing0.Rdmsr(PERF_CTL_0, out ctlEax, out ctlEdx);
     1.8 +      Ring0.Rdmsr(PERF_CTL_0, out ctlEax, out ctlEdx);
     1.9        uint ctrEax, ctrEdx;
    1.10 -      WinRing0.Rdmsr(PERF_CTR_0, out ctrEax, out ctrEdx);
    1.11 +      Ring0.Rdmsr(PERF_CTR_0, out ctrEax, out ctrEdx);
    1.12  
    1.13        timeStampCounterMultiplier = estimateTimeStampCounterMultiplier();
    1.14  
    1.15        // restore the performance counter registers
    1.16 -      WinRing0.Wrmsr(PERF_CTL_0, ctlEax, ctlEdx);
    1.17 -      WinRing0.Wrmsr(PERF_CTR_0, ctrEax, ctrEdx);
    1.18 +      Ring0.Wrmsr(PERF_CTL_0, ctlEax, ctlEdx);
    1.19 +      Ring0.Wrmsr(PERF_CTR_0, ctrEax, ctrEdx);
    1.20  
    1.21        // restore the thread affinity.
    1.22        NativeMethods.SetThreadAffinityMask(thread, mask);
    1.23 @@ -126,14 +126,14 @@
    1.24        uint eax, edx;
    1.25       
    1.26        // select event "076h CPU Clocks not Halted" and enable the counter
    1.27 -      WinRing0.Wrmsr(PERF_CTL_0,
    1.28 +      Ring0.Wrmsr(PERF_CTL_0,
    1.29          (1 << 22) | // enable performance counter
    1.30          (1 << 17) | // count events in user mode
    1.31          (1 << 16) | // count events in operating-system mode
    1.32          0x76, 0x00000000);
    1.33  
    1.34        // set the counter to 0
    1.35 -      WinRing0.Wrmsr(PERF_CTR_0, 0, 0);
    1.36 +      Ring0.Wrmsr(PERF_CTR_0, 0, 0);
    1.37  
    1.38        long ticks = (long)(timeWindow * Stopwatch.Frequency);
    1.39        uint lsbBegin, msbBegin, lsbEnd, msbEnd;
    1.40 @@ -142,11 +142,11 @@
    1.41          (long)Math.Ceiling(0.001 * ticks);
    1.42        long timeEnd = timeBegin + ticks;
    1.43        while (Stopwatch.GetTimestamp() < timeBegin) { }
    1.44 -      WinRing0.Rdmsr(PERF_CTR_0, out lsbBegin, out msbBegin);
    1.45 +      Ring0.Rdmsr(PERF_CTR_0, out lsbBegin, out msbBegin);
    1.46        while (Stopwatch.GetTimestamp() < timeEnd) { }
    1.47 -      WinRing0.Rdmsr(PERF_CTR_0, out lsbEnd, out msbEnd);
    1.48 +      Ring0.Rdmsr(PERF_CTR_0, out lsbEnd, out msbEnd);
    1.49  
    1.50 -      WinRing0.Rdmsr(COFVID_STATUS, out eax, out edx);
    1.51 +      Ring0.Rdmsr(COFVID_STATUS, out eax, out edx);
    1.52        uint cpuDid = (eax >> 6) & 7;
    1.53        uint cpuFid = eax & 0x1F;
    1.54        double coreMultiplier = MultiplierFromIDs(cpuDid, cpuFid);
    1.55 @@ -188,9 +188,9 @@
    1.56      public override void Update() {
    1.57        base.Update();
    1.58  
    1.59 -      if (miscellaneousControlAddress != WinRing0.InvalidPciAddress) {
    1.60 +      if (miscellaneousControlAddress != Ring0.InvalidPciAddress) {
    1.61          uint value;
    1.62 -        if (WinRing0.ReadPciConfigDwordEx(miscellaneousControlAddress,
    1.63 +        if (Ring0.ReadPciConfig(miscellaneousControlAddress,
    1.64            REPORTED_TEMPERATURE_CONTROL_REGISTER, out value)) {
    1.65            coreTemperature.Value = ((value >> 21) & 0x7FF) / 8.0f +
    1.66              coreTemperature.Parameters[0].Value;
    1.67 @@ -207,7 +207,7 @@
    1.68            Thread.Sleep(1);
    1.69  
    1.70            uint curEax, curEdx;
    1.71 -          if (WinRing0.RdmsrTx(COFVID_STATUS, out curEax, out curEdx,
    1.72 +          if (Ring0.RdmsrTx(COFVID_STATUS, out curEax, out curEdx,
    1.73              (UIntPtr)(1L << cpuid[i][0].Thread))) 
    1.74            {
    1.75              // 8:6 CpuDid: current core divisor ID