Hardware/CPU/AMD10CPU.cs
changeset 329 756af5ee409e
parent 301 d14ce71cef44
child 344 3145aadca3d2
     1.1 --- a/Hardware/CPU/AMD10CPU.cs	Mon Jan 02 18:44:19 2012 +0000
     1.2 +++ b/Hardware/CPU/AMD10CPU.cs	Mon Jan 02 20:45:18 2012 +0000
     1.3 @@ -246,42 +246,46 @@
     1.4      private double GetCoreMultiplier(uint cofvidEax) {
     1.5        switch (family) {
     1.6          case 0x10:
     1.7 -        case 0x11:
     1.8 -          // 8:6 CpuDid: current core divisor ID
     1.9 -          // 5:0 CpuFid: current core frequency ID
    1.10 -          uint cpuDid = (cofvidEax >> 6) & 7;
    1.11 -          uint cpuFid = cofvidEax & 0x1F;
    1.12 -          return 0.5 * (cpuFid + 0x10) / (1 << (int)cpuDid);
    1.13 -        case 0x12:
    1.14 -          // 8:4 CpuFid: current CPU core frequency ID
    1.15 -          // 3:0 CpuDid: current CPU core divisor ID
    1.16 -          uint CpuFid = (cofvidEax >> 4) & 0x1F;
    1.17 -          uint CpuDid = cofvidEax & 0xF;
    1.18 -          double divisor;
    1.19 -          switch (CpuDid) {
    1.20 -            case 0: divisor = 1; break;
    1.21 -            case 1: divisor = 1.5; break;
    1.22 -            case 2: divisor = 2; break;
    1.23 -            case 3: divisor = 3; break;
    1.24 -            case 4: divisor = 4; break;
    1.25 -            case 5: divisor = 6; break;
    1.26 -            case 6: divisor = 8; break;
    1.27 -            case 7: divisor = 12; break;
    1.28 -            case 8: divisor = 16; break;
    1.29 -            default: divisor = 1; break;
    1.30 +        case 0x11: 
    1.31 +        case 0x15: {
    1.32 +            // 8:6 CpuDid: current core divisor ID
    1.33 +            // 5:0 CpuFid: current core frequency ID
    1.34 +            uint cpuDid = (cofvidEax >> 6) & 7;
    1.35 +            uint cpuFid = cofvidEax & 0x1F;
    1.36 +            return 0.5 * (cpuFid + 0x10) / (1 << (int)cpuDid);
    1.37            }
    1.38 -          return (CpuFid + 0x10) / divisor;
    1.39 -        case 0x14:
    1.40 -          // 8:4: current CPU core divisor ID most significant digit
    1.41 -          // 3:0: current CPU core divisor ID least significant digit
    1.42 -          uint divisorIdMSD = (cofvidEax >> 4) & 0x1F;
    1.43 -          uint divisorIdLSD = cofvidEax & 0xF;
    1.44 -          uint value = 0;
    1.45 -          Ring0.ReadPciConfig(miscellaneousControlAddress,
    1.46 -            CLOCK_POWER_TIMING_CONTROL_0_REGISTER, out value);
    1.47 -          uint frequencyId = value & 0x1F;
    1.48 -          return (frequencyId + 0x10) /
    1.49 -            (divisorIdMSD + (divisorIdLSD * 0.25) + 1);
    1.50 +        case 0x12: {
    1.51 +            // 8:4 CpuFid: current CPU core frequency ID
    1.52 +            // 3:0 CpuDid: current CPU core divisor ID
    1.53 +            uint cpuFid = (cofvidEax >> 4) & 0x1F;
    1.54 +            uint cpuDid = cofvidEax & 0xF;
    1.55 +            double divisor;
    1.56 +            switch (cpuDid) {
    1.57 +              case 0: divisor = 1; break;
    1.58 +              case 1: divisor = 1.5; break;
    1.59 +              case 2: divisor = 2; break;
    1.60 +              case 3: divisor = 3; break;
    1.61 +              case 4: divisor = 4; break;
    1.62 +              case 5: divisor = 6; break;
    1.63 +              case 6: divisor = 8; break;
    1.64 +              case 7: divisor = 12; break;
    1.65 +              case 8: divisor = 16; break;
    1.66 +              default: divisor = 1; break;
    1.67 +            }
    1.68 +            return (cpuFid + 0x10) / divisor;
    1.69 +          }
    1.70 +        case 0x14: {
    1.71 +            // 8:4: current CPU core divisor ID most significant digit
    1.72 +            // 3:0: current CPU core divisor ID least significant digit
    1.73 +            uint divisorIdMSD = (cofvidEax >> 4) & 0x1F;
    1.74 +            uint divisorIdLSD = cofvidEax & 0xF;
    1.75 +            uint value = 0;
    1.76 +            Ring0.ReadPciConfig(miscellaneousControlAddress,
    1.77 +              CLOCK_POWER_TIMING_CONTROL_0_REGISTER, out value);
    1.78 +            uint frequencyId = value & 0x1F;
    1.79 +            return (frequencyId + 0x10) /
    1.80 +              (divisorIdMSD + (divisorIdLSD * 0.25) + 1);
    1.81 +          }
    1.82          default:
    1.83            return 1;
    1.84        }
    1.85 @@ -308,8 +312,13 @@
    1.86            uint value;
    1.87            if (Ring0.ReadPciConfig(miscellaneousControlAddress,
    1.88              REPORTED_TEMPERATURE_CONTROL_REGISTER, out value)) {
    1.89 -            coreTemperature.Value = ((value >> 21) & 0x7FF) / 8.0f +
    1.90 -              coreTemperature.Parameters[0].Value;
    1.91 +            if (family == 0x15 && (value & 0x30000) == 0x30000) {
    1.92 +              coreTemperature.Value = ((value >> 21) & 0x7FC) / 8.0f +
    1.93 +                coreTemperature.Parameters[0].Value - 49;
    1.94 +            } else {
    1.95 +              coreTemperature.Value = ((value >> 21) & 0x7FF) / 8.0f +
    1.96 +                coreTemperature.Parameters[0].Value;
    1.97 +            }
    1.98              ActivateSensor(coreTemperature);
    1.99            } else {
   1.100              DeactivateSensor(coreTemperature);