1.1 --- a/Hardware/CPU/AMD0FCPU.cs	Sat Apr 16 13:19:13 2011 +0000
     1.2 +++ b/Hardware/CPU/AMD0FCPU.cs	Sat Apr 16 14:49:47 2011 +0000
     1.3 @@ -52,9 +52,9 @@
     1.4      private const byte MISCELLANEOUS_CONTROL_FUNCTION = 3;
     1.5      private const ushort MISCELLANEOUS_CONTROL_DEVICE_ID = 0x1103;
     1.6      private const uint THERMTRIP_STATUS_REGISTER = 0xE4;
     1.7 -    private const byte THERM_SENSE_CORE_SEL_CPU0 = 0x4;
     1.8 -    private const byte THERM_SENSE_CORE_SEL_CPU1 = 0x0;
     1.9 -
    1.10 +    
    1.11 +    private readonly byte thermSenseCoreSelCPU0;
    1.12 +    private readonly byte thermSenseCoreSelCPU1;
    1.13      private readonly uint miscellaneousControlAddress;
    1.14  
    1.15      public AMD0FCPU(int processorIndex, CPUID[][] cpuid, ISettings settings)
    1.16 @@ -67,6 +67,16 @@
    1.17        if (model >= 0x69 && model != 0xc1 && model != 0x6c && model != 0x7c) 
    1.18          offset += 21;
    1.19  
    1.20 +      if (model < 40) {
    1.21 +        // AMD Athlon 64 Processors
    1.22 +        thermSenseCoreSelCPU0 = 0x0;
    1.23 +        thermSenseCoreSelCPU1 = 0x4;
    1.24 +      } else {
    1.25 +        // AMD NPT Family 0Fh Revision F, G have the core selection swapped
    1.26 +        thermSenseCoreSelCPU0 = 0x4;
    1.27 +        thermSenseCoreSelCPU1 = 0x0;
    1.28 +      }
    1.29 +
    1.30        // check if processor supports a digital thermal sensor 
    1.31        if (cpuid[0][0].ExtData.GetLength(0) > 7 && 
    1.32          (cpuid[0][0].ExtData[7, 3] & 1) != 0) 
    1.33 @@ -122,7 +132,7 @@
    1.34          for (uint i = 0; i < coreTemperatures.Length; i++) {
    1.35            if (Ring0.WritePciConfig(
    1.36              miscellaneousControlAddress, THERMTRIP_STATUS_REGISTER,
    1.37 -            i > 0 ? THERM_SENSE_CORE_SEL_CPU1 : THERM_SENSE_CORE_SEL_CPU0)) {
    1.38 +            i > 0 ? thermSenseCoreSelCPU1 : thermSenseCoreSelCPU0)) {
    1.39              uint value;
    1.40              if (Ring0.ReadPciConfig(
    1.41                miscellaneousControlAddress, THERMTRIP_STATUS_REGISTER,