External/WinRing0/OlsIoctl.h
author Stephane Lenclud
Sat, 30 Jan 2016 23:01:51 +0100
branchMiniDisplay
changeset 454 f84878f52cd9
permissions -rw-r--r--
Disabling Nuvoton NCT6791D because of fan full speed bug on Asus Z97 WS.
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//-----------------------------------------------------------------------------
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//     Author : hiyohiyo
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//       Mail : hiyohiyo@crystalmark.info
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//        Web : http://openlibsys.org/
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//    License : The modified BSD license
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//
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//                     Copyright 2007-2008 OpenLibSys.org. All rights reserved.
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//-----------------------------------------------------------------------------
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#pragma once
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//-----------------------------------------------------------------------------
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//
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// The Device type codes form 32768 to 65535 are for customer use.
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//
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//-----------------------------------------------------------------------------
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#define OLS_TYPE 40000
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//-----------------------------------------------------------------------------
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//
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// Version Information
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//
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//-----------------------------------------------------------------------------
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#define OLS_DRIVER_ID							_T("WinRing0_1_2_0")
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#define OLS_DRIVER_MAJOR_VERSION				1
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#define OLS_DRIVER_MINOR_VERSION				2
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#define OLS_DRIVER_REVISION						0
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#define OLS_DRIVER_RELESE						5
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#define OLS_DRIVER_VERSION \
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	((OLS_DRIVER_MAJOR_VERSION << 24) | (OLS_DRIVER_MINOR_VERSION << 16) \
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	| (OLS_DRIVER_REVISION << 8) | OLS_DRIVER_RELESE) 
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//-----------------------------------------------------------------------------
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//
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// The IOCTL function codes from 0x800 to 0xFFF are for customer use.
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//
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//-----------------------------------------------------------------------------
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#define IOCTL_OLS_GET_DRIVER_VERSION \
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	CTL_CODE(OLS_TYPE, 0x800, METHOD_BUFFERED, FILE_ANY_ACCESS)
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#define IOCTL_OLS_GET_REFCOUNT \
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	CTL_CODE(OLS_TYPE, 0x801, METHOD_BUFFERED, FILE_ANY_ACCESS)
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#define IOCTL_OLS_READ_MSR \
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	CTL_CODE(OLS_TYPE, 0x821, METHOD_BUFFERED, FILE_ANY_ACCESS)
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#define IOCTL_OLS_WRITE_MSR \
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	CTL_CODE(OLS_TYPE, 0x822, METHOD_BUFFERED, FILE_ANY_ACCESS)
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#define IOCTL_OLS_READ_PMC \
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	CTL_CODE(OLS_TYPE, 0x823, METHOD_BUFFERED, FILE_ANY_ACCESS)
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#define IOCTL_OLS_HALT \
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	CTL_CODE(OLS_TYPE, 0x824, METHOD_BUFFERED, FILE_ANY_ACCESS)
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#define IOCTL_OLS_READ_IO_PORT \
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	CTL_CODE(OLS_TYPE, 0x831, METHOD_BUFFERED, FILE_READ_ACCESS)
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#define IOCTL_OLS_WRITE_IO_PORT \
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	CTL_CODE(OLS_TYPE, 0x832, METHOD_BUFFERED, FILE_WRITE_ACCESS)
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#define IOCTL_OLS_READ_IO_PORT_BYTE \
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	CTL_CODE(OLS_TYPE, 0x833, METHOD_BUFFERED, FILE_READ_ACCESS)
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#define IOCTL_OLS_READ_IO_PORT_WORD \
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	CTL_CODE(OLS_TYPE, 0x834, METHOD_BUFFERED, FILE_READ_ACCESS)
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#define IOCTL_OLS_READ_IO_PORT_DWORD \
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	CTL_CODE(OLS_TYPE, 0x835, METHOD_BUFFERED, FILE_READ_ACCESS)
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#define IOCTL_OLS_WRITE_IO_PORT_BYTE \
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	CTL_CODE(OLS_TYPE, 0x836, METHOD_BUFFERED, FILE_WRITE_ACCESS)
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#define IOCTL_OLS_WRITE_IO_PORT_WORD \
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	CTL_CODE(OLS_TYPE, 0x837, METHOD_BUFFERED, FILE_WRITE_ACCESS)
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#define IOCTL_OLS_WRITE_IO_PORT_DWORD \
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	CTL_CODE(OLS_TYPE, 0x838, METHOD_BUFFERED, FILE_WRITE_ACCESS)
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#define IOCTL_OLS_READ_MEMORY \
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	CTL_CODE(OLS_TYPE, 0x841, METHOD_BUFFERED, FILE_READ_ACCESS)
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#define IOCTL_OLS_WRITE_MEMORY \
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	CTL_CODE(OLS_TYPE, 0x842, METHOD_BUFFERED, FILE_WRITE_ACCESS)
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#define IOCTL_OLS_READ_PCI_CONFIG \
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	CTL_CODE(OLS_TYPE, 0x851, METHOD_BUFFERED, FILE_READ_ACCESS)
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#define IOCTL_OLS_WRITE_PCI_CONFIG \
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	CTL_CODE(OLS_TYPE, 0x852, METHOD_BUFFERED, FILE_WRITE_ACCESS)
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//-----------------------------------------------------------------------------
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//
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// PCI Error Code
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//
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//-----------------------------------------------------------------------------
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#define OLS_ERROR_PCI_BUS_NOT_EXIST		(0xE0000001L)
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#define OLS_ERROR_PCI_NO_DEVICE			(0xE0000002L)
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#define OLS_ERROR_PCI_WRITE_CONFIG		(0xE0000003L)
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#define OLS_ERROR_PCI_READ_CONFIG		(0xE0000004L)
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//-----------------------------------------------------------------------------
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//
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// Support Macros
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//
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//-----------------------------------------------------------------------------
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// Bus Number, Device Number and Function Number to PCI Device Address
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#define PciBusDevFunc(Bus, Dev, Func)	((Bus&0xFF)<<8) | ((Dev&0x1F)<<3) | (Func&7)
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// PCI Device Address to Bus Number
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#define PciGetBus(address)				((address>>8) & 0xFF)
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// PCI Device Address to Device Number
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#define PciGetDev(address)				((address>>3) & 0x1F)
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// PCI Device Address to Function Number
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#define PciGetFunc(address)				(address&7)
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//-----------------------------------------------------------------------------
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//
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// Typedef Struct
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//
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//-----------------------------------------------------------------------------
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#pragma pack(push,4)
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typedef struct  _OLS_WRITE_MSR_INPUT {
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	ULONG		Register;
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	ULARGE_INTEGER	Value;
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}   OLS_WRITE_MSR_INPUT;
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typedef struct  _OLS_WRITE_IO_PORT_INPUT {
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	ULONG	PortNumber; 
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	union {
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		ULONG   LongData;
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		USHORT  ShortData;
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		UCHAR   CharData;
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	};
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}   OLS_WRITE_IO_PORT_INPUT;
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typedef struct  _OLS_READ_PCI_CONFIG_INPUT {
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	ULONG PciAddress;
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	ULONG PciOffset;
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}   OLS_READ_PCI_CONFIG_INPUT;
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typedef struct  _OLS_WRITE_PCI_CONFIG_INPUT {
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	ULONG PciAddress;
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	ULONG PciOffset;
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	UCHAR Data[1];
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}   OLS_WRITE_PCI_CONFIG_INPUT;
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typedef LARGE_INTEGER PHYSICAL_ADDRESS;
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typedef struct  _OLS_READ_MEMORY_INPUT {
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	PHYSICAL_ADDRESS Address;
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	ULONG UnitSize;
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	ULONG Count;
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}   OLS_READ_MEMORY_INPUT;
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typedef struct  _OLS_WRITE_MEMORY_INPUT {
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	PHYSICAL_ADDRESS Address;	 
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	ULONG UnitSize;
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	ULONG Count;
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	UCHAR Data[1];
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}   OLS_WRITE_MEMORY_INPUT;
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#pragma pack(pop)