Hardware/CPU/AMDCPU.cs
author moel.mich
Thu, 07 Jul 2011 20:41:09 +0000
changeset 308 d882720734bf
parent 236 763675f19ff4
child 344 3145aadca3d2
permissions -rw-r--r--
Added support for reading the TAMG ACPI table on Gigabyte mainboards. Fixed a small problem with HDD/SSD names (0 chars are trimmed now as well).
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/*
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  Version: MPL 1.1/GPL 2.0/LGPL 2.1
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  The contents of this file are subject to the Mozilla Public License Version
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  1.1 (the "License"); you may not use this file except in compliance with
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  the License. You may obtain a copy of the License at
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  http://www.mozilla.org/MPL/
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  Software distributed under the License is distributed on an "AS IS" basis,
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  WITHOUT WARRANTY OF ANY KIND, either express or implied. See the License
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  for the specific language governing rights and limitations under the License.
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  The Original Code is the Open Hardware Monitor code.
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  The Initial Developer of the Original Code is 
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  Michael Möller <m.moeller@gmx.ch>.
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  Portions created by the Initial Developer are Copyright (C) 2009-2010
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  the Initial Developer. All Rights Reserved.
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  Contributor(s):
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  Alternatively, the contents of this file may be used under the terms of
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  either the GNU General Public License Version 2 or later (the "GPL"), or
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  the GNU Lesser General Public License Version 2.1 or later (the "LGPL"),
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  in which case the provisions of the GPL or the LGPL are applicable instead
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  of those above. If you wish to allow use of your version of this file only
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  under the terms of either the GPL or the LGPL, and not to allow others to
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  use your version of this file under the terms of the MPL, indicate your
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  decision by deleting the provisions above and replace them with the notice
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  and other provisions required by the GPL or the LGPL. If you do not delete
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  the provisions above, a recipient may use your version of this file under
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  the terms of any one of the MPL, the GPL or the LGPL.
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*/
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namespace OpenHardwareMonitor.Hardware.CPU {
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  internal abstract class AMDCPU : GenericCPU {
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    private const byte PCI_BUS = 0;
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    private const byte PCI_BASE_DEVICE = 0x18;
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    private const byte DEVICE_VENDOR_ID_REGISTER = 0;
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    private const ushort AMD_VENDOR_ID = 0x1022;
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    public AMDCPU(int processorIndex, CPUID[][] cpuid, ISettings settings)
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      : base(processorIndex, cpuid, settings) { }
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    protected uint GetPciAddress(byte function, ushort deviceId) {
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      // assemble the pci address
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      uint address = Ring0.GetPciAddress(PCI_BUS,
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        (byte)(PCI_BASE_DEVICE + processorIndex), function);
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      // verify that we have the correct bus, device and function
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      uint deviceVendor;
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      if (!Ring0.ReadPciConfig(
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        address, DEVICE_VENDOR_ID_REGISTER, out deviceVendor))
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        return Ring0.InvalidPciAddress;
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      if (deviceVendor != (deviceId << 16 | AMD_VENDOR_ID))
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        return Ring0.InvalidPciAddress;
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      return address;
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    }
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  }
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}